Micromachining of detailed silicon structures on thin membranes is considered to be a principal microelectromechanical system (MEMS) fabrication technique. However, it is a highly difficult process.
When the membrane is approached, there is a notable decrease in lateral heat dissipation from the etching structures on a membrane. This causes the silicon to clear from the membrane layer, leading to a sharp change in the chemical loading effect. In case the associated heat is concentrated in a small area, then the exothermic etch reaction can also lead to degradation of the etch passivation and the resist pattern.
Fabrication of Micro/Nano-Scale Features
While fabricating micro- or nano-scale features, it is necessary to maintain a highly precise profile control. In addition to this, higher etch rates are also required to expose the membrane by removing the bulk material. Bulk etch can be performed through an anisotropic wet etch selective to the <111> crystallographic planes, namely, TMAH or KOH.
The wet etch is appropriate only for features with a low aspect ratio and leads to a typical slope at 54.74° for <100> silicon wafers, which restricts packing density and geometric freedom. A Bosch deep silicon etching (DSiE) process, or a gas-chopping DSiE process, involving alternating etch steps and deposition, enables achieving a high aspect ratio vertical profile with etch rates of up to 30µm/min. It also enables etching random shapes defined by the mask pattern with high packing density.
This article presents a technique, which deals with the above-mentioned issues and provides sample results for three characteristic structures, utilizing a PlasmaPro 100 Estrelas DSiE tool in the Bosch process (SF6-C4F8 chemistry).
DSiE Process Tools
A large number of the DSiE process tools are adapted to perform high rate anisotropic etch. However, these tools may have lower ability in performing precise and lower rate processes. Fast switching etch processes commonly require notably lower power to sustain the plasma during the changeover between the etching and deposition steps. The PlasmaPro 100 Estrelas DSiE tool can be efficiently operated at a power higher than the inductively coupled plasma (ICP) source power, i.e. <500W and >5kW, thereby enabling low rate processes as well as precise and high rate processes to be carried out in the same chamber. The minimum time required for a single process step to remove polymer is 100-300ms, thus enabling a complete cycle of deposition, break through and etch to be performed within a time period of 1s.
The results reported in this article involved cycle times of up to 2.5s. When the entire wafer surface, in contact with the conductive layers on the membranes, are clamped by an electrostatic chuck and where the membranes protrude out of the clamping plane, a large gap is formed, drastically reducing the heat removal efficiency through Helium back side cooling. Therefore, to prevent overheating and to maintain a precise profile control while etching structures on thin membranes, a low power process needs to be carried out.
Using the combination of precision processing and high rate, three devices have been achieved: a micro- resonator high-Q cavity having a vertical profile (90°) and a uniform scallop size (Figures 1 and 2), a fine periodic deep grating with 50:1 high aspect ratio (Figures 3 and 4), and a large length-width ratio cantilever on a photoresist membrane (Figures 5 and 6) in which prevention of mask overheating and avoiding damage to the polymer film beneath the cantilever were key features. In addition, smooth sidewalls and higher quality of the etched structures were also ensured.
Figure 1. Schematic section of a micro-resonator on a Si3N4 membrane: back cavity by KOH etching and the top pattern defined in a silicon membrane using the Bosch process.
Figure 2. Micro-resonator structure: (a) side view with vertical profile and a 60µm etch depth and (b) sidewall roughness (scallop size) of 78nm.
Figure 3. Schematic section of gratings in a SOI wafer: the back cavity defined by a high rate Bosch etch and fine period optical gratings realised in the device layer using a precision Bosch etch.
Figure 4. High aspect-ratio (50:1) fine period (200nm) gratings etched by a Bosch process: (a) etch depth 5µm and (b) minimal bow at top of trenches.
Figure 5. Challenges on Si membrane etch: (a) grass and striations in corners; (b) optimised etch gives striation-free and smooth sidewall; (c) PR mask burnt out during Bosch etch; (d) optimised etch avoids overheating on PR mask.
Figure 6. Si cantilever: (a) illustration of cantilever fabrication in Si membrane by means of wet-etching and Bosch process; (b) 5mm length × 200µm width × 50µm thickness cantilever; (c) and (d) enlarged view of the cantilever after polymer removal.
This information has been sourced, reviewed and adapted from materials provided by Oxford Instruments Plasma Technology.
For more information on this source, please visit Oxford Instruments Plasma Technology.