Using Electro-Optical Terahertz Pulse Reflectometry for Non-Destructive Fault Localization in Fan-out Wafer Level Packages

In the recent years, FOWL package designs have become universal due to their compatibility with mobile communications devices and their flexible form factor. Yet, the increase in the complexity of the circuit has posed new difficulties for the failure analysis personnel. For instance, the continuous decrease in density and size of the different components makes fast but accurate failure localization highly challenging.

Electro-optical terahertz pulse reflectometry (EOTPR) is a standard terahertz time-domain reflectometry method that facilitates non-destructive and rapid fault isolation in sophisticated IC packages. This broadband method has a considerably low time base jitter and high temporal resolution [1], thereby enabling it to localize faults with a distance-to-fault accuracy of more than 10 µm.

At the time of operation, the EOTPR produces high-frequency electrical pulses that are propelled into the device under test (DUT) through a high-frequency circuit probe (Figure 1a). A fast-photoconductive switch records reflections from device structures and faults as a voltage-time waveform. In general, the measurement process takes less than 30 seconds, enabling a high sample throughput. The fault location can be identified with a high degree of accuracy by comparing the waveforms acquired from a failed device to those obtained from reference devices and known good devices [1-8].

Schematic diagram of an EOTPR system.Typical raw EOTPR waveform from the open end of a circuit probe.

Fig 1. (a) Schematic diagram of an EOTPR system. (b) Typical raw EOTPR waveform from the open end of a circuit probe.

This article describes the application of the fault isolation method to an advanced FOWL package, showing how the method can be used to accurately and rapidly locate faults in the densely packed RDLs of a wafer level package.

Measurement

An EOTPR system comprises of two photoconductive switches, where one functions as an electrical pulse source and the other functions as an instantaneous current detector that is activated by a mode-locked near-infrared laser. A high-frequency circuit probe and a co-axial cable are used for coupling the emitted pulse into a DUT. The contact between the probe and the DUT pins of interest is realized with the help of a manual, semi- or fully automatic prober system connected to the EOTPR.

When the pulse propagates through the DUT, impedance changes in the DUT cause portions of the pulse to be reflected back toward the detector. These changes can be caused due to attributes in the DUT architectures and, crucially, also from defects in the device. The reflected pulse’s arrival time is measured with the help of a translation stage in the detector beam path that sweeps the relative delay between the emission and detection pulses (Figure 1a). The result is a continuous voltage-time waveform, such as that illustrated in Figure 1b, which has been acquired from an open probe (i.e. a probe not connected to a device, standing in air).

It is possible to readily convert the time axis of the waveform to actual distance in a net by knowing the propagation speed of the EOTPR pulse. This is acquired through comparison of the time taken for the EOTPR pulse to propagate between two known points in a DUT with the actual distance known from the device design. The required known points are obtained by typically preparing and measuring the reference devices with artificial faults in known locations (i.e. a bare substrate). Thus, a fault location can be determined with greater accuracy.

The package analyzed in this article uses non-traditional wafer-level packaging with novel interconnections, allowing a Package-on-Package configuration for a memory chip. A custom redistribution device, known as Via Frame Memory, can be used for achieving stacking. These components are incorporated into an epoxy mold compound on a series of RDLs. Figure 2 is a schematic illustration of the architecture of the device.

Schematic of the FOWL package used in this study.

Fig 2. Schematic of the FOWL package used in this study.

This article details the analysis of a DUT of the type depicted in Figure 2 after failing a continuity test. The test was carried out with the help of an automated test equipment following the completion of 1000 cycles of a Temperature Cycling Test within a range of −40 to 125 °C. I-V curve-tracing of the failing net was performed to confirm that the fault in the device was an open failure. Then, EOTPR was carried out on the failed DUT and the results have been reported in the following section.

Results and Discussion

Figure 3 illustrates the waveforms acquired from several samples measured at the time of this EOTPR investigation. The red curve shows the waveform for the failed unit waveform. The green curve shows the waveform for a known good device, and the blue curve shows the waveform acquired from a reference unit. The approximately known location of an open fault in the reference unit is shown by the orange arrow in Figure 4. This is recognized to be located 160 µm from the end of RDL 4.

EOTPR results

Fig 3. EOTPR results. The EOTPR waveform for the known good device is shown by the green line. The EOTPR waveform from the failed unit, shown by the red line, clearly shows an open fault, indicated by the positive peak in the waveform. This occurs at similar location to the open in reference sample, shown by the blue curve.

Layout of RDL 4

Fig 4. Layout of RDL 4. The arrow indicates the approximate position of the open fault in the reference sample, located 160 µm from the end of RDL 4.

The main features of the waveform have been highlighted in Figure 3. A purported “contact feature” is contained in each waveform at 0 ps, which is caused by the change in impedance at the probe-DUT interface. These must and do closely overlap, as a result of the similarities between the failed, reference, and known good devices before the fault locations.

A large, positive peak is demonstrated by the reference unit at about 80 ps, corresponding to the open fault at the end of RDL 4. The waveform for the failed unit evidently demonstrates a similar open fault, which appears in close proximity (within about 1 ps) to the open in the reference sample, suggesting that the fault in the failed unit is also located in RDL 4.

An accurate fault location in a failed unit can be determined by using the reference sample. This is accomplished by comparing the time taken by the EOTPR pulse to reach to the known feature (here, the open at the end of RDL 4) with the actual distance (acquired from the device design). Thus, the speed of travel of the EOTPR pulse in the DUT is obtained and can be in turn applied to the failing unit waveform. Upon applying the speed to the devices discussed in this article, EOTPR discovered that the fault is located 100 µm from the end of RDL 4.

Then, physical failure analysis was carried out on the region of RDL 4 in which EOTPR identified the fault. FIB was used to expose the region of interest, and the ensuing SEM images are illustrated in Figure 5. A crack can be evidently seen in the copper trace of RDL 4, which is the reason behind the open fault. Moreover, the crack is located 100 µm from the end of the trace, which is in accordance with the distance determined by EOTPR, further emphasizing the accuracy of this method.

SEM images showing the region of RDL 4 exposed with FIB on the failing unit

Fig 5. SEM images showing the region of RDL 4 exposed with FIB on the failing unit. A crack is clearly visible through RDL 4 causing the open fault.

Conclusion

To conclude, this article has demonstrated the use of EOTPR to non-destructively and rapidly isolate faults in FOWL packages. The article has also described the ability of EOTPR in locating faults with a distance-to-defect accuracy of better than 10 µm, making it a robust tool for rapid, non-destructive fault isolation in sophisticated FOWL packages. This article also emphasizes the lasting importance of EOTPR for the development of ultra-modern device architectures and the enhancement of semiconductor package design.

References

  1. Y. Cai, Z. Wang, R. Dias, and D. Goyal, “Electro Optical Terahertz Pulse Reflectometry—an Innovative Fault Isolation Tool,” Proceedings of the 60th Electronic Components and Technology Conference (ECTC), Las Vegas, Nevada, USA, June 1-4, pp. 1309-1315, 2010.
  2. S. Barbeau, J. Alton, and M. Igarashi, “Electro Optical Terahertz Pulse Reflectometry—a fast and highly accurate non-destructive fault isolation technique for 3D Flip Chip Packages,” Proceedings of the 39th International Symposium for Testing and Failure Analysis (ISTFA), San Jose, California, USA, November 3-7, 2013.
  3. K.C. Lee, J. Alton, M. Igarashi, and S. Barbeau, “Fast Feature Based Non-Destructive Fault Isolation in 3D IC Packages Utilizing Virtual Known Good Device,” Proceedings of the 41st International Symposium for Testing and Failure Analysis (ISTFA), Portland, Oregon, USA, November 1-5, 2015.
  4. C. Schmidt, P. S. Pichumani, J. Alton, M. Igarashi, L. Chan, and E. Principe, “Advanced Package FA flow for next-gen packaging technology using EOTPR, 3DXRAY & Plasma FIB,” Proceedings of the 42nd International Symposium for Testing and Failure Analysis (ISTFA), Fort Worth Convention Center; Fort Worth, Texas, USA, November 6-10, 2016.
  5. B. Zee, W. Qiu, J. Alton, T. White, and M. Igarashi, “Non-Destructive Fault Localization in 2.5D Packages Using Electro Optical Terahertz Pulse Reflectometry,” Proceedings of the 43rd International Symposium for Testing and Failure Analysis (ISTFA), Pasadena, California, USA, November 5-9, 2017.
  6. Yi-Sheng Lin, Yu-Hsiang Hsiao, and Shu-Hua Lee, “Application of Electro Optical Terahertz Pulse Reflectometry for Fault Localization and Defect Analysis,” Proceedings of the 43rd International Symposium for Testing and Failure Analysis (ISTFA), Pasadena, California, USA, November 5-9, 2017.
  7. M. Y. Tay, L. Cao, M. Venkata, L. Tran, W. Donna, W. Qiu, J. Alton, P. F. Taday, and M. Lin, “Advanced Fault Isolation Technique Using Electro-optical Terahertz Pulse Reflectometry,” Proceedings of the 19th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore, July 2-6, 2012.
  8. L. Cao, M. Venkata, M. Y. Tay, W. Qiu, J. Alton, P. F. Taday, and
  9. M. Igarashi, “Advanced Fault Isolation Technique Using Electro-optical Terahertz Pulse Reflectometry (EOTPR) for 2D and 2.5D Flip-chip Package,” Proceedings of the 38th International Symposium for Testing and Failure Analysis (ISTFA), Phoenix, Arizona, USA, November 11-15, pp. 21-25, 2012.

This information has been sourced, reviewed and adapted from materials provided by TeraView Ltd.

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