Using GaAs Based VCSELs for the High Yield Manufacturing of Mesas

Demand for VCSEL is growing fast due to requirements set by optical interconnect, face recognition and LIDAR technologies. The tech industry is growing at an unprecedented rate, and this means that the scale of VCSEL production is increasing too, and, for this reason, it is vital that manufacturers produce a high yield while maintaining excellent quality. Some applications (e.g. 3D sensors) focus on maximum power conversion using VCSEL arrays for higher combined output power

When such arrays are used, uniform threshold currents and differential quantum efficiencies must be maintained between lasers. This can be achieved only by excellent epitaxial control, as well as careful regulation of mesa shape. As the need for denser arrays increases, there will be challenges in maintaining uniformity, line width and aspect ratio.

With deep expertise in this process, as well as sound knowledge of the device, Oxford Instruments Plasma Technology has brought out powerful plasma processing technologies that ensure excellent performance of VCSEL devices, as well as a high manufacturing yield. This article describes the best way to regulate the mesa geometry for wafers up to 150 mm across. This includes the necessary conditions for either tapered or vertical profile creation while achieving accurate depth control for the mesa.

Main Fabrication Steps of VCSEL Structures

The simple structure of VCSEL devices makes it possible to manufacture the devices at high volume and at very cost-effective rates. In contrast to edge-emission laser devices, the number and size of VCSELs that can be produced per wafer is higher. Since VCSELs are fabricated vertically, other components can be integrated into the device. For instance, photodetectors, circuits, mirrors and other necessary components can be made part of the structure as chip on board (COB) technology. With advancements in industry demands, more designs have been produced based on the requirements of each application. The following description is a simple version of a process flow meant to produce a blueprint of a laser cavity.

There are a number of steps involved when fabricating VCSELs. The table in Figure 1 shows a table representing a simplified outline of each step of fabrication of GaAs-based VCSEL, highlighting the Oxford Instrument solution for specific steps. The PlasmaPro 100 ensures uniformity of wafer processing for sizes up to 200 mm. Most devices on the VCSEL market today are around 150 mm, so most of the work demonstrated here will focus on wafer sizes between 100 mm and 150 mm.

Simplified process flow for fabricating VCSEL cavity (top) and PlasmaPro 100 Cobra module (bottom)

Figure 1. Simplified process flow for fabricating VCSEL cavity (top) and PlasmaPro 100 Cobra module (bottom)

Masks and Related Issues

The mesa profile reflects the mask profile to a large extent. The mesa etch is anisotropic, and the angle of the etch depends on the selectivity and the original profile of the mask. If the mesa has a pronounced slope, then so will the mask. In such a situation, the angle can be made less steep using a photoresist mask.

Depending on the target profile of the mesa, either a hard mask or a photoresist mask can be utilized. Hard masks for mesa etches are fabricated from SiN or SiOz. With hard masks, the DBR stack has higher selectivity if the film density is increased and this in turn increases the etching depth.

Once the process of mask opening is optimized to the right degree (i.e. so that the target profile is displayed), hard masks may be considered. However, stringent design of the process must be adhere to during mask slopping, as the use of passivation may cause too much roughness on the side walls. If the mesa profile is controlled with the mask, the selectivity can be regulated to control the mesa profile in turn. The PlasmaPro 100 Cobra 300 has been used by Oxford Instruments Plasma Technology to show the mask profile from 60o to 90o.

SiN Mesa mask profile angle (a) 60° (b) 90°

Figure 2. SiN Mesa mask profile angle (a) 60° (b) 90°

Precise and Uniform Mesa Height and Profile

Many sequential parameters may be evaluated following etching to ascertain the mesa geometry. Some of the key parameters measured are the top and the bottom diameter of the mesa. These may be measured very often, as part of profile angle measurement. It is also necessary to control mesa height accurately, across the whole wafer, as well as from one wafer to another.

The DBR structure comprises pairs of GaAs/AlGaAs with varying aluminum content. The layer stack is generally dry etched by the ICP technique, which is capable of performing well at very low pressures yet high plasma density. The advantage of low pressure processing is that etching is carried forward in only one direction, when the conditions allow for high mean free paths. This results in highly anisotropic etching, which makes it much easier to regulate critical dimensions. The use of electrostatic clamping during the process allows minimum edge exclusion, and is a common part of the production environment.

Chlorine-based chemistry is used here, because chlorine reacts with gallium, arsenide and aluminum to form byproducts that are volatile at the operating temperatures of the process. The boiling points of the byproducts are shown in Figure3.

III-V element By-products Boiling point (at Vapor pressure Torr)
Ga GaCl3 50 ºC (at 2)
As AsCl3 100 ºC (at 1)

Figure 3. Boiling point of by-products. Courtesy of Indium Phosphide and related materials by Avishay Katz

Designing a process to obtain a mesa with a desired profile requires careful regulation of various ionic concentrations, as well as of radicals. The main influencing factors here are gas flow, ICP power and pressure. The resulting profile emerges as a result of passivation and etching.

GaAs has a low bond energy, so the process is a low-energy pathway based on mainly chemical reaction. This is beneficial as users are able to achieve high etching rates, but the process also tends to etch slower in the center. For top yields, the etch rate must be regulated to ensure uniformity, and this is maintaining the same species available over the whole wafer. The methods used for this purpose rely on reducing residence time to the minimum, or by compensation for loading to keep it uniform all over.

As is shown in Figure 4, the chemical nature of the process leads the profile to show a foot. Since the center of the open area shows a faster etching rate, the depth of the etch begins to show variations from the center of the groove to the edge. This is usually assessed in quantitative terms as a percentage of the complete depth of etching. If the foot is not properly regulated, it can create erroneous readings of depth accuracy and thus negatively impact laser behavior. Another problem is that the requirement that the etch stops within a single layer of the DBR cannot be achieved if the foot is thicker than the layer thickness.

It is typically easier to fabricate a mesa with a sloped profile and low footing than a vertical mesa with low footing. With a sloped mesa, ions rebound from the sidewalls during the etch before hitting the bottom of the etched surface. This is why the etch rate becomes slower towards the center of the trench. Maintaining a balance between etching and passivation allows control of both the foot and the profile. Sloped profiles and low footings are achieved by high passivation.

VCSEL mesa etch cross section with significant footing (13%)

Figure 4. VCSEL mesa etch cross section with significant footing (13%)

To achieve greater control of the etching depth, the depth must be actively tracked via optical emission spectroscopy (OES). The oscillation can be tracked in the gallium and aluminum concentration as tracking advances through different DBR layers, due to the high uniformity and low footing that results with the use of the PlasmaPro 100.

This is therefore an excellent technique for completely automated assembly line manufacture. Figure 5 shows an OES trace, which was recorded by the PlasmaPro 100 for a mesa with a sloped profile that showed uniform etching depth within +/-1% over the whole wafer. The trace shows the clear definition of each oscillation, which represents one DBR pair. It is possible to set the process to stop at any desired peak by monitoring the first derivative of the signal.

OES trace of Gallium line for a sloped mesa. Within wafer uniformity ±1%.

Figure 5. OES trace of Gallium line for a sloped mesa. Within wafer uniformity ±1%.

Laser reflectometry provides another means of monitoring etch depth. It is advantageous in that it also allows real time in situ tracking of the reflectance produced by a laser targeting the wafer surface. This method yields data on one point and thus mandates consistent positioning of the wafer. Figure 6 shows one example of the laser signal trace.

Reflectivity as a function of etching time

Figure 6. Reflectivity as a function of etching time

Using process recipes brought out by Plasma Technology, etching can be done which combines excellent control of profile depth with low footing using the PlasmaPro 100 Cobra and monitoring of etching depth. The SEM image below shows the results obtained using 100 mm and 150 mm wafers.

Tapered profile with low footing (top), range of VCSEL diameter tested (middle) & vertical profile mesa (bottom)

Tapered profile with low footing (top), range of VCSEL diameter tested (middle) & vertical profile mesa (bottom)

Tapered profile with low footing (top), range of VCSEL diameter tested (middle) & vertical profile mesa (bottom)

Figure 7. Tapered profile with low footing (top), range of VCSEL diameter tested (middle) & vertical profile mesa (bottom)


Oxford Instruments Plasma Technology has collaborated closely with the compound semiconductor community of compound semiconductor workers to achieve the best device performance, as well as the highest efficiency of fabrication. The firm has brought out powerful new plasma processing technologies that optimize yield and device performance parameters to meet VCSEL market demand.

This article has explored how VCSEL mesas can be produced to high accuracy standards - from masking to etching - as well as providing devices that succeed with accelerated lifetime testing. Another achievement is the traditional vertical profile as well as the sloped profile necessary for 3D sensing.

Both masking and mesa etching are demonstrated at excellent uniformity at wafers of sizes up to 150 mm, a dimension that is crucial to allow uniform threshold current and differential quantum efficiency in VCSEL arrays. Plasma Technology has won patents for ESC that have led to the production of mesas with consistently uniform profiles and low footing. Oxford Instruments has capitalized on their experience in developing solutions to monitor plasma processes to show how endpoint detection can be completely automated, thus achieving strict control of the end layer (i.e. mesa height).

This information has been sourced, reviewed and adapted from materials provided by Oxford Instruments Plasma Technology.

For more information on this source, please visit Oxford Instruments Plasma Technology.


Please use one of the following formats to cite this article in your essay, paper or report:

  • APA

    Oxford Instruments Plasma Technology. (2019, March 20). Using GaAs Based VCSELs for the High Yield Manufacturing of Mesas. AZoM. Retrieved on June 19, 2019 from

  • MLA

    Oxford Instruments Plasma Technology. "Using GaAs Based VCSELs for the High Yield Manufacturing of Mesas". AZoM. 19 June 2019. <>.

  • Chicago

    Oxford Instruments Plasma Technology. "Using GaAs Based VCSELs for the High Yield Manufacturing of Mesas". AZoM. (accessed June 19, 2019).

  • Harvard

    Oxford Instruments Plasma Technology. 2019. Using GaAs Based VCSELs for the High Yield Manufacturing of Mesas. AZoM, viewed 19 June 2019,

Tell Us What You Think

Do you have a review, update or anything you would like to add to this article?

Leave your feedback