Semiconductors and electronic parts are produced on thin, spherical discs known as wafers. Wafers typically have a diameter of 100, 150, 200, or 300 mm and can be made from various conductive or non-conductive materials, such as silicon, sapphire, or glass.
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This in-depth blog discusses the production and processing of wafers, the characteristics of a perfect wafer, and applications for measuring which can be used to ensure product quality.
The Manufacturing Process
Semiconductors and microelectronic components are produced on thin, spherical discs known as wafers. Wafers typically have a diameter of 100, 150, 200, or 300 mm and can be made from various conductive or non-conductive materials, such as silicon, sapphire, or glass.
During the production process, multiple etching, grinding, and polishing procedures are used for the blank wafers. These manufacturing procedures provide the wafers with an almost entirely flat surface. A series of subsequent structuring and deposition operations are repeated to create the components and structures.
From the Initial Product Ingot to High-Quality Wafers
Microelectronic, microsystems, and solar manufacturers have strict standards for the production tolerances of the pre-product “wafer.” Even tiny variations can affect the quality in the cost-intensive, downstream process steps.
This produces poorer yields and decreases the efficiency and reliability of the finished goods. In wafer production, high-quality, completely automated multi-sensor measuring technology helps manage process tolerances and uphold the quality requirements required by the producers.
Sawing, Grinding, and Polishing — Tolerances and Standards in Wafer Processing
Wafers are the substrate for the production of light-emitting diodes, integrated circuits, solar cells, and micromechanical (MEMS) components. Exceptionally tiny, thin wafers are primarily used for the production of 3D IC components.
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Micrometer-sized circuit packages are produced by stacking and connecting in a vertical direction. Microchips mounted on thin wafers are constructed.
This shrinking enables the realization of more efficient circuits, such as those for more powerful and energy-efficient logic components, small CMOS image sensors, and efficient solid-state discs. There are many requirements for the wafer parameters of the finished product, so maximum accuracy is necessary for grinding, sawing, and polishing.
Sawing the Starting Product
The raw material for wafer fabrication is the ingot, a block of a semiconductor material like silicon, or a compound material like gallium arsenide (GaAs). During this process, the ingot is typically removed from the melt using the Czochralski method and then doped.
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The ingot is sliced into individual raw wafers using a high-precision wafer saw. As a result, grooves are made, and their width and depth must be assessed. Optical measuring devices with several sensors are optimized for this job.
The saw contour can be seen in three dimensions and quantified and defined, a task that is beyond the capabilities of traditional optical microscopes. The quantitative measurement enables improved control of the sawing process, leading to much more minor variations in this process phase.
Additionally, the behavior of various materials throughout the sawing process can be assessed, as well as the tool wear of the processing equipment.
Grinding Evenly
Following sawing, the wafers are mechanically thinned using techniques including grinding and lapping. Specific quality standards must be upheld while grinding a raw wafer or structured wafer. The TTV value, for example, indicates uniform removal during grinding for raw wafers.
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The TTV value, which represents the actual thickness variation of the complete wafer, is a statistical value based on a metrological wafer thickness measurement.
The goal is to calculate the total thickness variation (TTV), which is the maximum difference between the thickest and thinnest point.
Smooth Polishing
A polishing pad contacts the thin wafer surface and polishes it under pressure during the thin wafer polishing process using a polishing paste (slurry) made of abrasive and chemically effective ingredients.
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Friction removes material from the wafer surface. The chemical and abrasive substance is bound in a pad for a dry-polish procedure.
Lower contact pressure is adequate for this technique. Information can be inferred about the surface quality from the measurement of roughness, so optical measuring systems are used to track the polishing process.
It Has to Be Flat: The Perfect Wafer
The wafer’s surface finish is defined by its flatness. The wafer is optimized if the surface is flat. Inconsistencies in height could cause contacting issues during the next stage of stacking on a 3D IC wafer package.
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The doping put into the substrate should not be withdrawn too far, and the wafers must be crushed to a precise thickness. A 2D profile measurement can also be used to inspect the wafer edge at random. The wafer producer can use this information to calculate the tool wear rate and improve the process variables.
The role played by the waste near the wafer’s edge is also significant. The more effectively this is done, the more chips may be later created on the wafer, increasing the “fill factor.” For instance, the height, width, and coplanarity of processed wafers with bump structures or solder balls can be evaluated.
Special Interest: Advanced Microchip Packaging
The semiconductor industry is rapidly evolving advanced packaging technologies to deliver the speed, capability, and form factor needed for the mobile market.
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As wafer-level packaging (WLP) and heterogeneous integration (HI) approaches become more relevant, metrology processes start to delve into back-end process control, where measurement becomes more challenging and diversified.
The emergence of fan-out (FO) procedures at the panel and wafer levels has increased the variety of metrology requirements. This variety has further grown by the inclusion of 2.5D and 3D heterogeneous integration as well as current chiplet technologies.
A semiconductor substrate (like silicon) must undergo several physical and chemical procedures to fabricate an integrated circuit (IC). Millions of transistors can be manufactured and connected to make the intricate circuitry of a modern microelectronic device by building structures out of various components.
2.5D IC with Si interposer and 3D integrated circuits (3D IC) are considered potential candidates to overcome Moore’s law’s limits owing to their lower power consumption. Several essential technologies are needed to integrate ICs in 3D and 2.5D.
To ensure product quality and yield, given the price and complexity of these new packaging technologies, cost-effective inspection and metrology solutions must be applied throughout the entire process.
Meeting the Measurement Requirements
Modern optical measuring systems make it simple to measure wafers with high accuracy and keep up with the growing demands on precision and reproducibility, whether this is for measurement techniques with multiple layers, such as with bonded or taped wafers, edge evaluation of the wafers, or the evaluation of the coplanarity of bump structures.
TTV (Total Thickness Variation) Setup: Option for Two-Sided Sample Inspection
Two non-contact chromatic white light sensors can be used in the system's opposing sensor configuration (TTV configuration).
The FRT MicroProf® surface measurement tool can evaluate the roughness and the TTV with extremely high resolution.
This multi-sensor tool measures the entire wafer surface and provides measurements for thickness, TTV, bow, warp, flatness, high-definition 3D topography, and 2D profile. The optical sensors are quick and extremely precise. The system can also be fitted with an atomic force microscope (AFM).
SurfaceSens Concept
The 3D surface measuring devices can be rigged with point, line, and field of view sensors for topography research and film thickness sensors based on the SurfaceSens concept. Atomic force microscopy can also be used. Consequently, complex measurement jobs can be resolved using a variety of sensors by gathering data and then merging the various outputs.
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The critical moment occurs when the tool, or recipe, fully understands and executes the entire measuring operation. This indicates that the data collecting using all required sensors is automated and that the software also logs various outcomes and determines the appropriate parameters.
Hybrid Metrology: Determine Parameters That Cannot Be Measured Directly
A hybrid measuring concept increases the precision of measurements on samples for which a single sensor or a single measuring principle is simply not adequate.
Depending on the application, it may also involve completely automated measurements using various topography and (layer) thickness sensors.
These sensors, which are managed by FRT software, automatically collect many data sets to combine data that is not readily accessible with a single sensor to produce new information.
The MicroProf® Series: Standard and Special Solutions to Improve Production Efficiency
FRT provides the appropriate standard and unique solutions to increase production productivity, whether users require a solo, non-contact wafer measurement tool for the lab or an entirely automated, incorporated tool in your front-end or back-end regions.
From manually controlled or partially automated tools, like the MicroProf® 300, to fully automated tools with wafer handling, many levels of automation are available. It has automatic pre- and fine alignment in the MicroProf® MHU for processing microelectronics and wafers in very high volumes.
Further options include the handling of thin wafers and an ionizer bar.
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Tools may also come with strong image-capturing hardware for innovative pattern detection. FRT systems can be set up to handle both non-standard and SEMI-compliant wafers, which are utilized frequently in the MEMS sector.
From trench and thin film measurements to the inspection of crucial parameters throughout the complete manufacturing process, we also provide a range of solutions for the expanding market area of 3D IC manufacture.
The MicroProf® FE, MicroProf® FS, and MicroProf® AP are clean room manufacturing tools FRT offers for semiconductor applications. Filter fan units (FFU) are a common feature of MicroProf® equipment, ensuring ISO Class 3 clean room conditions inside the device.
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The MicroProf® can process wafers of 150/200 mm and 200/300 mm in a single system (FOUP, SMIF, and open wafer cassettes possible).
The SEMI-compliant software GUI enables interactive or automated use, easy creation of measurement and evaluation recipes and integration into existing production control systems via the SEMI-compliant SECS/GEM interface. This interface sends measurement data to the following station in the manufacturing process.
This information has been sourced, reviewed and adapted from materials provided by FormFactor Inc.
For more information on this source, please visit FormFactor Inc.