On-Chip Quantum Optics with Photonic Circuits

Quantum optics is a rapidly evolving field where single photons can be employed in applications such as secure communication, universal quantum computing and simulation of complex quantum systems. In the past, experiments in this field have been primarily conducted using bulk optics, i.e. with optical tables full of lenses, mirrors and other components. However, this is not a particularly scalable approach for more advanced experiments as the alignment, stabilization and required space of the optical tables become growingly unrealistic.

Nevertheless, these issues can be circumvented using integrated optics and with the help of a Raith EBPG5000+[1, 2]. Dr. Menno Poot from the University of Yale, USA, is pursuing this on-chip approach.

On-Chip Quantum Optics

In the linear quantum optics approach, quantum information is encoded on single photons that serve as qubits [3]. “Dual-rail encoding” is the most logical way of doing encoding on a chip. The following two optical waveguides can be considered: a single photon represents the logical “0” state as it travels through the first, whereas a single photon in the other waveguide is represented as “1”. When a Y-splitter is used, an interesting fact is that, there is an equal possibility of detecting the photon in either of the two output waveguides.

Therefore, a superposition of 0 and 1 is created. Normally, any unitary quantum operation on a single qubit can be executed when photons are sent through well-designed photonic circuits consisting of directional segments and couplers with relative length differences. While two-qubit operations can also be performed, in linear optics quantum computing, these are non-deterministic processes. A post-selection of the results of the experiment can be made by recognizing the photons; this implements an efficient interaction between pairs of photons.

This is at the center of the familiar “KLM scheme” [4]. Photon detection should be made at the maximum possible efficiency. Therefore, integrating the detectors on the same chip as the photonic circuits is critical to prevent interconnect loss. Detectors with the best quantum efficiency are made using very narrow superconducting wires [5]. These devices briefly go to the normal state upon absorbing a photon resulting in a measurable voltage pulse. Whenever superconductors are used, the chip has to be cooled to extremely low temperatures. The amount of heat dissipated on the chip must be minimized to keep the chip cold. Hence, electrostatically controlled phase shifters are used to make the quantum circuits programmable.

Dark field micrograph of a device for a controlled NOT quantum operation.

Figure 1. Dark field micrograph of a device for a controlled NOT quantum operation. Grating couplers (blue triangles) are used to get single photons on the chip. The quantum operation is implemented using photonic circuits with directional couplers. Each individual device, such as the one shown here, measures 1.5 by 1 mm. Image credit: Raith

Details of the integrated quantum optical devices.

Figure 2. Details of the integrated quantum optical devices. (a) Etch windows for releasing the optoelectromechanical phase shifters. The photoresist protects the superconducting single-photon detectors from the etchant. (b) Zoom of an “H” phase shifter. The electrodes are yellow, the released device and waveguide are green, and the silicon oxide (as well as a very thin layer of SiN) is indicated in blue. (c) Optical waveguide with an SSPD (red) on top. The inset shows the apex and alignment on the waveguide. (d) Bird’s eye view of the CNOT circuit. The rings are used to determine the relative optical phases in the as-fabricated circuits [7]. Four of the eight phase shifters are partly visible. Image credit: Raith

These MEMS devices do not dissipate any heat and work well at cryogenic temperatures [6]. Figure 1 shows an overview of a finished chip while the various elements are highlighted in Figure 2.

Fabrication Process

Considering the numerous different technologies that are combined when making the chips (such as superconductors, MEMS, photonics), more than six lithography steps are required. Two of these technologies employ standard photolithography, whereas the others are performed with electron-beam lithography. For this purpose, a Raith EBPG5000+ was used. The initial point is a Si wafer with thermally grown LPCVD Si3N4 and SiO2 layer. The latter is used as a cladding, with the movable parts and optical circuits implemented in the silicon nitride.

This material has excellent optical and mechanical properties. A few nm of NbTiN are sputtered on material surface; these thin films become superconducting at around 11 K. Alignment markers and electrodes are defined in the initial step. Following this, the superconducting detectors are written and etched. To pattern the SiN, reactive-ion etching is used in the next two steps. In the first step, a thin SiN layer is left behind, while the second etches all the way into the underlying oxide. Now, by submerging the chip in buffered hydrofluoric acid, the mechanical structures are released, followed by critical point drying.

Lithography Challenges

E-beam lithography faces numerous challenges while writing these complex circuits. These challenges can be faced with advanced equipment such as the EBPG.

Proximity Effect Correction

The metal layer is the first to be written on the chip. Different beam currents are employed as both large (190x90 µm) contact pads and fine features such as the narrow (as little as 125 nm) gap between the movable and fixed electrodes are involved. How the exposure is optimized using proximity effect correction to prevent overexposure is shown in Figure 3.

Micrograph of developed PMMA

Figure 3. Micrograph of developed PMMA, which was written without proximity effect correction. The nine narrow electrodes required to actuate the phase shifters are overexposed in the region between the large contact pads. Image credit: Raith

Stitching

Stitching is unavoidable because the size of the individual devices exceeds the largest write field of the Raith EBPG5000+. By using intrinsic methods and/or data processing, EBPG stitching artifacts can be reduced or even fully removed even at the largest field sizes.

Micrograph of a waveguide that crosses the boundary between two write fields

Figure 4. Micrograph of a waveguide that crosses the boundary between two write fields (indicated by the dotted line). The EBPG shows excellent stitching, which is specified as < 15 nm. Image credit: Raith

Overlay

Another key aspect is the relative placement of all the different layers. The metallic markers are essential. Figure 5 shows that these metallic markers are protected with a cover of SU-8 which is patterned using photolithography. This protection is essential to achieve accurate overlay of the different layers.

Markers after etching through the SiN.

Figure 5. Markers after etching through the SiN. The top row shows the images as acquired using the integrated BSE detector of the EBPG5000+. The left two panels are markers without protection. Redeposited gold (b) creates regions with high electron scattering [bright spots in (a)] that prevent accurate marker recognition. With SU-8 protection (c, d), the marker remains unaffected (c), resulting in good overlay. The optical micrograph in (d) shows the markers underneath the SU-8 protection; the marker indicated by the arrow was exposed. Image credit: Raith

High Resolution for SSPDs

Another lithography challenge is writing the single-photon detectors. Figure 2(d) depicts how a photon momentarily breaks the super-conductivity, when it is absorbed in U-shaped nanowire manufactured out of patterned NbTiN. However, this is only feasible when the wire is very narrow and thin. The thickness, which is generally 4-8 nm, is set by the film deposition. However, the lithography sets the width. Nanowires as narrow as 30 nm were effectively fabricated using high-resolution HSQ resist and small beam step size. Additionally, the flexibility of e-beam lithography permits the effects of the detector geometry on features such as its quantum efficiency to be investigated.

Smooth Waveguides

Eventually, smooth waveguides are acquired through small beam step sizes. With relatively little effort, propagation losses of 1.5 dB/cm[2] were obtained. This can be made better by reflowing the ZEP 520A e-beam resist after developing it or by using even smaller resolutions. In both these cases, smoother waveguides with even lesser scattering loss are found.

integrated optical quantum device after the final fabrication step.

Figure 6. Overview of an integrated optical quantum device after the final fabrication step. Image credit: Raith

Conclusion and Outlook

The Raith EBPG is the ideal tool for the nanofabrication of the integrated photonic circuits. Accurate placement of the different lithography steps is achieved by the tool’s good overlay using automated marker search and alignment. The ease of switching resolutions and beam currents and also the PEC support permit flexible writing approaches. This is done instinctively using the graphical Cview and Cjob utilities supplied with the EBPG. Currently, Dr. Menno Poot is working on further optimization of all the individual components developed on the chips and their characterization at cryogenic temperature. In the next step, non-classical light such as photons will be sent into these exciting devices and more complex optical quantum circuits shall be designed and produced.

References

  1. M. Poot, H. X. Tang et al., Photonic quantum optics circuits with integrated superconducting single-photon detectors and optomechanical phase shifters, In preparation
  2. M. Poot, C. Schuck, X.-S. Ma, X. Guo, H. X. Tang, Design and characterization of integrated components for SiN photonic quantum circuits, Opt. Expr. 24 6843-6860 (2016)
  3. P. Kok, W.J. Munro, K. Nemot, T.C. Ralph, J. Dowling, G. J. Milburn, Linear optical quantum computing with photonic qubits, Rev. Mod. Phys. 79 135-174 (2007)
  4. E. Knill, R. Laflamme, G. J. Milburn, A scheme for efficient quantum computation with linear optics, Nature 409 45 (2001)
  5. C. Schuck, X. Guo, L. Fan, X. Ma, M. Poot, H. X. Tang, Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip Nature Communications 7 10352 (2016)
  6. M. Poot and H. X. Tang, Broadband nano-electromechanical phase shifting of light on a chip, Appl. Phys. Lett. 104 061101 (2014)
  7. M. Poot and H. X. Tang, Characterization of optical quantum circuits using resonant phase shifts, Appl. Phys. Lett. 109 131106 (2016)

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