Failure analysis (FA) is an essential part of semiconductor device manufacturing it is the detective work that roots out defects and helps maintain the consistent, reliable manufacture of high quality components.
In this white paper we present a suite of plasma processing tools for FA with the aim of providing practical guidance as to their suitability for different tasks. One way of uncovering a fault and diagnosing its origin is the progressive and precise removal of various device layers to expose the embedded circuit structure. The density of modern integrated circuits (ICs) means that wet etching processes are no longer viable for this forensic task and they have now been displaced by more sophisticated plasma processing techniques. Plasma etching allows accurate and reproducible delayering, while plasma deposition enables the conformal coating of features of interest, a technique called decoration, this provides the sharp contrast required for productive imaging.
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Figure 1. Since Very-Large-Scale-Integration (VLSI) began in the 1970s IC designs have become increasingly dense and complex, creating a significant challenge for FA. Courtesy of Cepheiden.
The merits of plasma enhanced (PE) etching, reaction ion etching (RIE) and inductively coupled plasma (ICP) etching are considered for the removal of materials routinely encountered in FA. Plasma enhanced chemical vapour deposition (PECVD) and atomic layer deposition (ALD) are compared for decoration applications.
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This information has been sourced, reviewed and adapted from materials provided by Oxford Instruments Plasma Technology.
For more information on this source, please visit Oxford Instruments Plasma Technology.