Jul 21 2006
Malvern Instruments has appointed Bernd Looser to the new post of Applications Specialist Process Systems. One of his main areas of focus in this role will be to develop, test and prove new and innovative on-line measurement systems. Bernd will also be involved in the development and execution of marketing activities and in furthering relationships with Malvern’s global process customers. This appointment highlights Malvern’s continuing commitment to providing and fully supporting robust, fully integrated on-line particle sizing solutions for industrial processes.
Bernd joins Malvern having recently completed a degree in Process Engineering at the University of Applied Science in Constance, Germany. He has already contributed to Malvern’s product development through his work on the company’s patented diluter during a student placement in 2004. This diluter is now a key component of the recently launched Insitec LPS, a flexible on-line system for wet processes.
Welcoming Bernd, Oliver Schmitt, Business Line Manager for Malvern Process Systems said, “With the addition of the Insitec LPS to our well-established in- and on-line dry analysis technology, Malvern now delivers continuous particle size analysis for an increasingly broad range of industrial processes. Bernd will focus on the development of innovative solutions to meet the wide variety of online particle sizing challenges for this growing range of applications.”
Looking well ahead
Industrial exploitation of 90-nm CMOS industrial technology is possible based on the rules for industrial fabrication developed in the MEDEA+ T201 CMOS logic 0.1 µm project. In the year following the end of T201, 25 submicron circuits were processed at Crolles 2, at the joint Freescale, Philips Semiconductors and STMicroelectronics pilot 300-mm wafer facility at Grenoble in France. These EUREKA projects have set the scene for the future. MEDEA+ T207 65nm CMOS300 involved new substrate materiels as well as multilevel interconnect metallization for 65nm circuit nodes. The 65-nm process has been established with significant yield improvements and reliability specifications and is now ready for the manufacture of prototype customer chips. The chipmaking partners will be sharing their 65-nm cell libraries and IP blocks are confident about the success of the process to be produced from 2008. And EUREKA projects are already being planned to exploit the results of the EU Sixth Framework Programme (FP6) PULLNANO project that is looking further ahead at the needs for 32-/22-nm scale circuitry.