ACM Research Shanghai has unveiled the integrated Ultra iSFP, its latest semiconductor production tool that delivers zero-damage 45 to 65 nm copper interlink stress free polishing (SFP).
The Ultra iSFP tool is a combination of the SFP’s electrochemical mechanism, thermal flow etch (TFE) and ultra-low down force chemical mechanical planarization (ULCMP). It integrates the unique advantages of all these process steps and does not cause damage to the core device structure.
The formation of air gap interlink structures based on SiO2 utilizing the Ultra iSFP provides numerous benefits. The simple process enables the utilization of a conventional SiO2 damascene and dielectric process ensuring that there is no need for new material development and no damage is caused to ultra-small interlink structures and ultra-slim copper line.
The Ultra iSFP platform has an automatic alignment structure, and eliminates the need of a hard mask. By selectively creating air gap interlink structures in ultra-narrow line spaces, it offers superior mechanical strength to defy pressure during packing and superior thermal property for dissipation of heat.
In the Ultra iSFP process, the wafer undergoes the ULCMP process that utilizes endpoint sensing to ensure an unbroken 150 nm Cu film, thus causing no damage to the core low-k structure. The wafer then passes through a cleaning brush to strip large particles and a space alternating phase shift megasonic clean process to strip oxide and small particles. Subsequent to a non-contact, in-tool measurement of copper thickness, the wafer enters into the SFP process chamber for the removal of the non-recess copper to the barrier and then undergoes a bevel cleaning step.
The clean wafer moves into the TFE process for the removal of the barrier after pre-heat. The wafer is then cooled and then passes through the equipment front end module and finally to the front opening unified pod. The electrochemical SFP polishing tool delivers precise polishing performance without causing damage to the low-k and very low-k dielectrics.
Moreover, the SFP polishing process eliminates deformation or erosion to the dielectric barrier and layer, thus protecting the copper/low-k or very low-k dielectrics from damages caused by mechanical stress, which inturn resolves integration problems of copper/low-k and copper/very low-k dielectrics.
Source: ACM Research Inc.