Sep 25 2014
A new method to enhance the performance and the reliability of carbon nanotubes-based circuits and transistors has been developed by a group of researchers from the Northwestern University and the University of Texas at Austin.
Optical images of individual SWCNT field-effect transistors. Credit: S. Jang and A. Dodabalapur/University of Texas at Austin
Carbon nanotubes (CNT) hold promise as a potential successor to silicon for electronics applications, as silicon may meet its physical limit for smaller electronic devices. The researchers found that a polyvinyledenedifluoride-tetrafluoroethylene (PVDF-TrFE) fluoropolymer coating could help enhance the functioning of single-walled carbon nanotubes (SWCNT).
These nanotubes are cylinders that are fabricated by rolling graphene. They can be bent, flattened and twisted without breaking. Further, they possess good electric conductivity, transparency and mobility.
Polycrystalline silicon field-effect transistors (FETs ) are presently used in organic light-emitting (OLED) displays. Single-walled carbon nanotube FETs, which have similar properties and can be used for displays, can be printed or solution-processed, enabling them to be manufactured at a lower cost.
The leader of the research and professor at the Cockrell School of Engineering at UT Austin, Ananth Dodabalapur stated that drawbacks in power dissipation and stability limit their usage for printed electronics applications.
The research team used inkjet printing and deposited PVDF-TrFE over the self-fabricated single-walled carbon nanotube transistors. This film was annealed and then analyzed. It demonstrated significant improvements in performance at the circuit and device levels. Transistors are a critical component in circuits, and this film enabled better and faster performing circuits while consuming low-power. The polar nature of PVDF-TrFE enabled more stable and energy-efficient transistors that could have a longer life.
Earlier, single-walled carbon nanotube FETs were made by dispersal in an organic solvent to produce printable ink. Background impurity concentration may occur in this method and affect the transistors’ performance. In the new process, the stable orientation adopted after annealing by dipoles in PVDF-TrFE molecules overcomes the effects caused by charged impurities.
This improved the performance of the device by enabling carrier flow. The researchers compared the effects of non-polar and polar vapors on single-walled carbon nanotube FETs to verify their hypothesis.
The Office of Naval Research has supported this Multi-University Research Initiative study, which has been published in the journal Applied Physics Letters.
Source: http://apl.aip.org