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Ultra-Clean Fabrication Process to Create Virtually Ideal 2D Transistors

Semiconductors, which are the standard building blocks of lasers, transistors, microprocessors, and LEDs, have stimulated progress in computing, communications, memory, and lighting technologies since the mid-20th century. Recently discovered two-dimensional (2D) materials, which consist of a number of superlative properties, have the ability to advance these technologies, but producing 2D devices with good electrical contacts as well as stable performance has proved difficult.

An enhanced optical microscope image of a Hall-bar structure used to characterize transistor properties for devices made with ultraclean transferred contacts. The long radial lines, made from deposited gold, connect the small contacts at the center of the device to large probe pads for easy measurements. (Image credit: MIN SUP CHOI/COLUMBIA ENGINEERING)

Scientists at Columbia Engineering report that they have exhibited an almost ideal transistor built from a 2D material stack—with just a two-atom-thick semiconducting layer—by creating a totally clean and damage-free fabrication process. Their technique demonstrates hugely enhanced performance compared to 2D semiconductors fabricated using a conventional process, and could offer a scalable platform for developing ultra-clean devices in the future. The research paper was published recently in Nature Electronics.

Making devices out of 2D materials is a messy business. Devices vary wildly from run to run and often degrade so fast that you see performance diminish while you’re still measuring them.

James Teherani, Assistant Professor of Electrical Engineering, Columbia Engineering

Getting tired of the unreliable results, Teherani’s team began to look for a better way to create stable devices. “So,” he explains, “we decided to separate the pristine device from the dirty fabrication processes that lead to variability.”

As illustrated in this new research, Teherani and his colleagues created a two-step, ultra-clean nanofabrication process that segregates the “messy” steps of fabrication—those that involve “dirty” metallization, polymers, and chemicals used to develop electrical connections to the device—from the active semiconductor layer. Once they fulfill the messy fabrication, they could pick up the contacts and convey them onto the clean active device layer, maintaining the integrity of both layers.

The thinness of these semiconductors is a blessing and a curse. While the thinness allows them to be transparent and to be picked up and placed wherever you want them, the thinness also means there's nearly zero volume—the device is almost entirely surface. Because of this, any surface dirt or contamination will really degrade a device.

James Teherani, Assistant Professor of Electrical Engineering, Columbia Engineering

Presently, a majority of devices are not encapsulated with a layer that safeguards the surface and contacts from contamination while the fabrication process takes place. Teherani’s team demonstrated that their technique can now not only safeguard the semiconductor layer so that they do not witness performance degradation over time, but it can also produce high-performance devices.

Teherani worked with Jim Hone, Wang Fong-Jen Professor of Mechanical Engineering, utilizing the fabrication and analysis facilities of the Columbia Nano Initiative and the National Science Foundation-funded Materials Research Science and Engineering Center at Columbia. The team created the transferred contacts from metal embedded in insulating hexagonal boron nitride (h-BN) outside a glovebox and then dry-transferred the contact layer onto the 2D semiconductor, which was kept unspoiled within a nitrogen glovebox. This process stops direct-metallization-induced damage while at the same time offering encapsulation to safeguard the device.

Now that the scientists have formulated a consistent, repeatable process, they are using the platform to build devices that can be transferred out of the lab into real-world engineering problems.

The development of high-performance 2D devices requires advances in the semiconductor materials from which they are made. More precise tools like ours will enable us to build more complex structures with potentially greater functionality and better performance.

James Teherani, Assistant Professor of Electrical Engineering, Columbia Engineering

Building at the Nanoscale | Part 01: 2D vs 3D Materials

Video on the differences between 2D and 3D materials (Video credit: Columbia Engineering)

Building at the Nanoscale | Part 02: How to Build 2D Atomic Stacks

Video on the step-by-step nanofabrication of 2D material stacks. (Video credit: Columbia Engineering)

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