New modelling shows how strain and advanced dielectrics can counter phonon-driven performance losses in ultra-scaled MoS2 transistors.
Study: Phonon Scattering Effects with Introduced Strain and High-k Dielectrics on Electrical Properties of Molybdenum Disulfide Field-Effect Transistors. Image Credit: u_kawy/Shutterstock.com
The study, published in the Journal of Electronic Materials, examines one of the central challenges in next-generation transistor design: Controlling phonon scattering in ultra-scaled molybdenum disulfide (MoS2) field-effect transistors (FETs).
By combining strain engineering with high-k dielectric integration, researchers show that performance losses in nanometre-scale devices can be significantly mitigated – at least within the quasi-ballistic transport regime.
As silicon devices approach physical scaling limits, atomically thin semiconductors such as MoS2 are increasingly viewed as viable alternatives. Monolayer MoS2 offers an on/off ratio of up to 1010, low leakage current, and strong electrostatic control, all of which are attractive properties in deeply scaled logic devices.
Yet its performance is constrained by phonon scattering, particularly at short channel lengths and elevated temperatures.
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Using a modified ballistic FETToy model based on a top-of-the-barrier (ToB) framework, the researchers simulated MoS2 FETs with channel lengths of 6 nm and 10 nm across temperatures from 200 K to 500 K.
They found that phonon scattering reduced current by as much as 43.5 % at 10 nm relative to the ideal ballistic limit. Degradation increased with temperature: while absolute current rose due to thermal carrier excitation, the reduction relative to ballistic transport worsened, reaching 45.8 % at 500 K.
Ballisticity analysis revealed why.
At low energies, acoustic phonons dominate transport. But as gate bias and temperature increase, optical phonon scattering becomes more prominent, sharply reducing ballistic transport and pushing the device toward more diffusive behaviour.
These effects are especially significant in the quasi-ballistic regime where carrier injection velocity, rather than long-channel mobility, governs performance.
Compressive vs Tensile Strain
To counter phonon-induced degradation, the team introduced biaxial strain into the MoS2 channel by modifying the electron effective mass in the model.
A compressive strain of -5 % reduced the effective mass and enhanced the injection velocity, improving the current by 13.1 % at 10 nm. Tensile strain (+5 %), by contrast, increased effective mass and suppressed performance.
Importantly, the authors note that this outcome is specific to ultra-scaled, quasi-ballistic devices (6-10 nm).
In longer, mobility-dominated diffusive channels, tensile strain can enhance transport by modifying intervalley-scattering pathways, a distinction critical for interpreting strain results across different device regimes.
High-k Dielectrics And Electrostatic Control
The researchers also examined the effect of integrating a high-k dielectric, aluminium oxide (Al2O3). Under unstrained conditions, the dielectric improved the current by 22.4 % at 10 nm.
When combined with -5 % compressive strain, the current improved by up to 49.5 % at 6 nm, relative to the corresponding strained baseline device. The enhancement does not exceed the intrinsic ballistic limit; rather, it reflects improved electrostatic coupling and reduced effective mass within the ToB framework.
The study further highlights dielectric screening effects. High-k materials strengthen gate control, improve carrier injection efficiency, and reduce Coulomb interactions, thereby enhancing quasi-ballistic transport.
From Device Physics To Circuit Operation
To assess circuit-level viability, the team implemented a complementary metal-oxide-semiconductor (CMOS) inverter using p-type and n-type MoS2 FETs.
The inverter exhibited a switching threshold near VDD/2, voltage gain exceeding 10 at higher drain bias (peaking at 12.2), and noise margins of 0.19 V and 0.21 V. These characteristics indicate strong signal restoration capability suitable for cascaded logic applications.
The results align closely with previously published models and experimental data, supporting the robustness of the modified ToB framework.
The findings apply strictly to the quasi-ballistic regime examined (channel lengths of 6-10 nm). The model captures intrinsic phonon scattering but excludes extrinsic effects, such as contact resistance, charged-impurity scattering, and surface roughness. In fabricated devices, these factors could reduce absolute performance.
Nevertheless, the work provides a systematic modelling approach for evaluating phonon-limited transport in ultra-scaled two-dimensional semiconductors.
Ultra-Scaled Logic with High Performance MoS2
The study reinforces that phonon scattering remains a primary barrier to high-performance MoS2 transistors at nanometre scales. But it also demonstrates that carefully engineered compressive strain, combined with high-k dielectric integration, can partially offset these limitations without violating fundamental ballistic transport constraints.
Journal Reference
Wong, Y., et al. (2026). Phonon Scattering Effects with Introduced Strain and High-k Dielectrics on Electrical Properties of Molybdenum Disulfide Field-Effect Transistors. J. Electron. Mater. DOI: 10.1007/s11664-026-12711-6
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