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SET, Smart Equipment Technology, Leading Semiconductor Supplier, Joins IRT Nanoelec 3D Integration Program

Will Work with Leti, STMicroelectronics and Mentor Graphics to Develop Advanced 3D Die-to-wafer Stacking Technologies Using Direct Cu-Cu Bonding

SET, Smart Equipment Technology, the leading supplier in high accuracy die-to-die and die-to-wafer bonders, today announced its participation in the 3D integration consortium of IRT Nanoelec, which is headed by CEA-Leti.

SET joins Leti, STMicroelectronics and Mentor Graphics to develop advanced 3D die-to-wafer stacking technologies, using direct copper-to-copper bonding.

Based in Grenoble, France, IRT Nanoelec is an R&D center focused on information and communication technologies (ICT) using micro- and nanoelectronics. 3D integration is one of its core programs.

The 3D integration program was launched in 2012. It brings together, under a single roof, expertise and equipment addressing the entire 3D integration value chain: technology, circuit architecture, EDA tools, packaging and test. Mentor Graphics (EDA), ST (foundry) and Leti are the founding members of the consortium.

All SET employees, and in particular the team involved in the 3D project, are proud and enthusiastic to join IRT Nanoelec. Our integration in this program is a logical continuation of the collaboration initiated with CEA teams 35 years ago on different bonding projects, including laboratory high-precision bonder for Cu-Cu direct bonding.

One of the key factors for SET joining this consortium is the opportunity to meet and discuss with experts from different specialties.

Pascal Metzger - CEO, SET

Maintaining high accuracy for components assembly as well as good control of the parameters, while increasing dramatically the throughput, is a real challenge, but we are eager to start the daily work together with IRT teams to reach our mutual goals.

Nicolas Raynaud - Project Manager, SET

Séverine Chéramy, director of IRT Nanoelec’s 3D integration program, said the objective is to offer designers 3D die-to-wafer stacking at an aggressive pitch – less than 10µm – at high speed, at room temperature and without pressure or underfill.

I’m particularly proud to welcome SET, a French SME, to the program, because it shows the complementarity of the scope of work. The collaboration with SET on die-to-wafer bonding, using copper-to-copper bonding at very high accuracy and high speed, is really exciting and challenging.

The consortium’s knowledge of such bonding techniques, combined with expertise on high-accuracy SET equipment, offers many opportunities for heterogeneous 3D integration that address a wide range of potential applications. These include imaging, sensors, logic and photonics.

Séverine Chéramy - Director, IRT

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